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data sheet rev. 2.1 1 2000-10-11 voltage-current regulator tle 4305 p-dso-8-3 features ? wide supply voltage operation range ? wide ambient temperature operation range ? minimized external circuitry ? high voltage regulation accuracy ? high current limit regulation accuracy ? low temperature drift ? independent voltage- current-loop compensation ? internal fixed amplification ? fully temperature compensated current- and voltage ota (operational transconductance amplifier) ? smd package functional description the tle 4305 g is specifically designed to control the output voltage and the output current of a switch mode power supply. independent compensation networks for the voltage- and for the current-loop can be realized by external circuitry. the device contains a high accuracy bandgap reference voltage, two operational trans conductance amplifier (ota), an opto-coupler driver output stage and an high-voltage bias circuit. the device is based on infineons double isolated power line technologie dopl which allows to produce high precision bipolar voltage regulators with breakdown voltages up to 45 v. type ordering code package tle 4305 g q67006-a9341 p-dso-8-3
tle 4305 data sheet rev. 2.1 2 2000-10-11 figure 1 pin configuration (top view) pin definitions and functions pin no. symbol function 1s supply voltage ; external blocking capacitor necessary (see figure 4 ). 2vse voltage sense input ; non inverting with respect to voltage compensation vco; internal compared with the high accuracy bandgap-reference (typ. 2.5 v). 3out output ; npn emitter follower output with an internal series resistor of 1 k w ; controlled by the potential of vco or cco; output voltage is internally clamped therefore the output current is internally limited. 4cse current sense input 1 ; connected to an internal voltage divider (reference to the inverting input of the current ota; see ). 5gnd ground ; reference potential unless otherwise specified. 6cco current compensation output ; internal series resistor to the current-ota output (typ. 1 k w ); amplification internal temperature compensated; current loop compensation can be done by an external capacitor to gnd. 7vco voltage compensation output ; internal series resistor to the voltage-ota output (typ. 1 k w ); amplification internal temperature compensated; voltage loop compensation can be done by an external capacitor to gnd. 8cre current-ota reference input ; current sense reference input; non inverting input of the current-ota. vse aep02887 1 2 3 4 8 7 6 5 cre out vco cco gnd cse s
data sheet rev. 2.1 3 2000-10-11 tle 4305 figure 2 block diagram aeb02879 c-ota control logic r i1 25 k r i2 2 k 1 k r vc 1 k v-ota biasing and bandgap- reference v ref tle 4305g vse cse gnd out vco v ref driver cre r cc 1 k cco s 1 2 4 8 7 3 6 5
tle 4305 data sheet rev. 2.1 4 2000-10-11 note: stresses above those listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings parameter symbol limit values unit remarks min. max. voltages supply voltage v s C 0.3 45 v C input voltages v vse ; v cse ; v cre C 0.3 7 v C output voltages v out ; v vco ; v cco C 0.3 7 v C currents output current i out C 5 3 ma C output current i vco ; i cco C 0.5 0.5 ma C esd-protection human body model v esd C 2000 2000 v according to mil std 833 d temperatures junction temperature t j C 40 150 cC storage temperature t stg C 50 150 cC thermal resistances junction ambient r thj-a C 200 k/w C
data sheet rev. 2.1 5 2000-10-11 tle 4305 note: in the operating range, the functions given in the circuit description are fulfilled. operating range parameter symbol limit values unit remarks min. max. supply voltage v s 842v C junction temperature t j C 40 150 cC
tle 4305 data sheet rev. 2.1 6 2000-10-11 electrical characteristics 8v < v s < 42 v; C 40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max. current consumption supply current i s C11.5ma v s =9v; t j =25 c supply current i s CC2ma v s =9v supply current i s C1.52.5ma v s =42v; t j =25 c supply current i s CC4ma v s =42v reference voltage (measurable at pin cse) voltage at pin cse v cse,ref 2.45 2.50 2.55 v t j =25 c; i cse =0ma voltage at pin cse v cse,ref 2.425 C 2.575 v i cse =0ma temperature coefficient d v cse,ref C 50 C 50 ppm/k C voltage-ota; pin vse and vco input voltage threshold v vse C v ref Cv i vco =0ma; v vco =2.5v input offset voltage v vse,io C5 5 mv i vco =0ma; v vco =2.5v transconductance g v C1Cms g v = d i vco / d u vse output series resistor r vco C2Ck w C gain bandwidth product b v C500CkhzC input current i vse C1.0 C0.2 C0 m a v vse =0v output current; source i vco C150 C60 C25 m a v vse = 5 v ; v vco =2.5v output current; sink i vco 25 60 150 m a v vse =0v ; v vco =2.5v
data sheet rev. 2.1 7 2000-10-11 tle 4305 current-ota; pin cse and cco input voltage threshold v cse C 210 C 200 C 190 mv i cco =0ma; v cco =2.5v transconductance g c C1Cms g c = d i cco / d u cse output series resistor r cco C2Ck w C gain bandwidth product b c C500CkhzC input current i cse C200 C100 C50 m a v cse =0v output current; source i cco C150 C60 C25 m a v cre =2.5v; v cse =0v; v cco =2.5v output current; sink i cco 25 60 150 m a v cre =0v; v cse =0v; v cco =2.5v current reference input pin cre input current i cre C1.0 C0.2 C0 m a v cse =0v; v cre =0v electrical characteristics (contd) 8v < v s < 42 v; C 40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
tle 4305 data sheet rev. 2.1 8 2000-10-11 note: the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. output pin out output voltage limit v out 345.5v v vse =5v; r out-gnd =22k w output current; voltage loop controlled i out C8.5 C4 C2 ma 10v < v s < 42 v v vse =5v; v out =0v output current; voltage loop controlled i out C4.5 C2.0 C0.5 ma 8v < v s < 10 v v vse =5v; v out =0v output current; current loop controlled i out C8.5 C4 C2 ma 10v < v s < 42 v v cse =0v; v cre =5v; v out =0v output current; current loop controlled i out C4.5 C2.0 C0.5 ma 8v < v s < 10 v v cse =0v; v cre =5v; v out =0v electrical characteristics (contd) 8v < v s < 42 v; C 40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
data sheet rev. 2.1 9 2000-10-11 tle 4305 application information the tle 4305 is a voltage and current regulator for switch mode power supply (smps) applications. it controls the output voltage and the maximum output current of a power supply unit. it is located on the secondary side of the smps. the tle 4305 consists of a output voltage control loop and a current control loop. the driver is especially designed to drive the opto-isolator. the current controls the pwm duty cycle of the primary regulator. isolated smps switch mode power supply (smps) systems generate a regulated dc voltage v q that is isolated from the primary side. a maximum output current i qmax is defined to protect the system in any load failures. figure 3 isolated smps principle the principle of an isolated smps is shown in figure 3 . the primary side of the smps is supplied by the line. the secondary side supplies a regulated voltage to the load. primary and secondary side are isolated from each other by the transformer and an opto isolator. a smps controller such as the infineon tda1683x controls the pwm duty cycle of the output voltage signal. the signal is transmitted by a transformer with n1: n2 (n: number of windings). on the secondary side a load capacitor is charged. the secondary regulator controls the output voltage v q and limits the output current. it generates an analog control signal to the primary side through an opto isolator to regulate the pwm duty cycle of the primary signal. the loop is closed through the primary smps regulator and the transformer. simple smps defines the output voltage by a voltage divider and a transistor. this requires very precise resistor values and due to the nature of the transistor the control signal is dependent on temperature and device variation. the current limitation has to be done on the primary side with elements suitable for high voltages. aes02888 smps with cool set secondary regulator with tle 4305 opto isolator line precise output voltage output current precise limited short circuit protected
tle 4305 data sheet rev. 2.1 10 2000-10-11 smps with tle 4305 secondary regulator the tle 4305 is located on the secondary side of the regulator and controls the output voltage as well as it limits the output current. voltage and current can be chosen independent from each other by the designer according to the applications requirements. figure 4 application circuit figure 3 shows the tle 4305 as smps secondary regulator as application circuit. the load capacitor c l is charged by the pwm-signal at the secondary side of the transformer. the diode d2 defines the current flow in the transformer. aes02878 tle 4305g c cco 10 nf cco c vco 10 nf vco cre gnd vse v s c s 100 nf d1 rgl34d n 3 n 1 cse r sense out c l 470 m f d2 sms2100 n 2 smps primary side cool set tda 1683x pwm duty cycle = f( v fb ) fb optocoupler l s c s1 c s2 + - v q line r v1 r v2 v q = 2.5 v ( r v1 + r v2 ) / r v2 [1] i q = 0.2 v / r sense [2]
data sheet rev. 2.1 11 2000-10-11 tle 4305 the tle 4305 includes an independent voltage control and current control loop. the internal schematic is shown in figure 2 . for i q < i qmax the voltage control gets priority. if the supply operates in the overcurrent protection mode, the current loop is active and reduces the output voltage with constant output current i qmax . the output voltage/output current curve is shown in figure 5 . both the current control loop and the voltage control loop are temperature compensated. figure 5 current and voltage limit the voltage or current loop regulator result defines the current into the opto isolator to control the pwm duty cycle. the led driver is fully integrated, no external components are required. aed02882 v q i q voltage regulator active current regulator active v q i qmax cross over
tle 4305 data sheet rev. 2.1 12 2000-10-11 voltage control loop figure 6 voltage loop the voltage loop regulator compares the input voltage v se to a reference voltage v ref of typical 2.5 v. the difference is attenuated and proportional current drives the opto isolator. the control loop output voltage v q , pin vse, pin out, opto isolator, primary regulator and the transformer close the loop. to program an output voltage a divider is used. the resistors are chosen according to equation [5] . v vse = v ref [3] v vse = v q r v2 / ( r v1 + r v2 )[4] with v ref typical 2.5 v v q = v vse ( r v1 + r v2 ) / r v2 [5] to compensate the voltage loop a 10 nf capacitor should be connected to pin vco. with the internal 1 k w resistor it reduces the overall closed voltage loops bandwidth. if the gain of the overall loop has to be adapted to the applications needs, the output capacitor can be modified accordingly. aes02883 v-ota c vco 10 nf vse voltage loop tle 4305 control logic from current loop 1 k w r vc 1 k w out vco r v2 driver r v1 v q v ref
data sheet rev. 2.1 13 2000-10-11 tle 4305 current control loop figure 7 current control loop to detect the current a sense resistor r sense is placed in the current back-path to the transformer (see figure 4 and figure 7 ). the control operational amplifier compares the voltage at pin cre to the voltage at the inverting input of the ota. in an overcurrent condition, the overall closed loop through current loop, opto isolator, primary regulator, transformer and the application reduces the pwm duty cycle to meet the closed loop condition. v cse C v cre is typical 200 mv. the current limit is defined by i qmax = 200 mv / r sense [6] to compensate the overall closed current loop a 10 nf capacitor should be connected to pin vco. with the internal 1 k w resistor it reduces the voltage loops bandwidth. as already explained for the voltage loop, the capacitor can be modified according to the overall loops bandwidth. to further improve the current control in addition a compensation can be added at pin cre as shown in figure 8 . aes02880 c-ota r i1 25 k w c cco 10 nf v ref cse cre current loop tle 4305 control logic from voltage loop 1 k w r cc 1 k w out cco r i1 25 k w r sense d2 driver
tle 4305 data sheet rev. 2.1 14 2000-10-11 figure 8 improved current control loop the calculation of the current is identical to the above calculation ( equation [6] ). the voltage at resistor r cre can be neglected (typical 2 mv for 10 k w resistor). the resistor r cre and the capacitor c cre improve further the current control loop response. supply of the tle 4305 the tle 4305 is an active circuitry and requires a supply voltage at pin v s . during start up of the supply, there is no energy stored in the load capacitor. dependent on the required output voltage also during operation the output voltage might be too small. therefore a second transformer-winding n3 is required. the voltage charges the input capacitor c s though the diode d1. internally the tle 4305 generates for input voltages above 8 v a preregulated 6 v internal rail. the device generates biasing currents and reference voltages from this rail. to avoid ground and v q -shifts, all gnd connections should be connected to one point as well as all v q -signals. if the application requires more than one voltage linear post-regulators can be used. in the application a choke should be placed in series. an electrolyte or tantalum capacitor of 10 m f to 100 m f should be used in parallel to a 10 to 100 nf ceramic capacitor to filter high frequency noise. the size of the choke and the capacitors depend on the application requirements. aes02881 c-ota r i1 25 k w c cco 10 nf v ref cse cre current loop tle 4305 control logic from voltage loop 1 k w r cc 1 k w out cco r i1 25 k w r cre 10 k w c cre 100 nf v q r sense d2 driver
data sheet rev. 2.1 15 2000-10-11 tle 4305 package outlines p-dso-8-3 (plastic dual small outline package) gps09032 sorts of packing package outlines for tubes, trays etc. are contained in our data book package information dimensions in mm smd = surface mounted device
data sheet rev. 2.1 16 2000-10-11 tle 4305 edition 2000-10-11 published by infineon technologies ag, st.-martin-strasse 53, d-81541 mnchen, germany ? infineon technologies ag 2000. all rights reserved. attention please! the information herein is given to describe certain components and shall not be consid- ered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descrip- tions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, deliv- ery terms and conditions and prices please contact your nearest infineon technologies office in germany or our infineon technolo- gies representatives worldwide (see ad- dress list). warnings due to technical requirements components may contain dangerous substances. for in- formation on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the fail- ure of that life-support device or system, or to affect the safety or effectiveness of that de- vice or system. life support devices or sys- tems are intended to be implanted in the hu- man body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endan- gered.

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